TDT09 - System and runtime software interaction with modern hardware
Title: System and runtime software interaction with modern hardware
Teacher: Michael Engel
System and runtime software gain new opportunities for resource-efficient operation due to novel hardware capabilities, such as persistent memories, massive multicore systems, or application-specific accelerators. Nevertheless, these new features also create novel problems, e.g. in security (side-channel timing attacks such as Spectre), energy and power consumption (dark silicon effects), or dependability problems due to the increased transistor number and density. Accordingly, system and runtime software on all levels – hypervisors, operating systems, compilers and just-in-time translators – have to adapt to exploit useful features while mitigating the problematic ones. In this course, we will analyze current related approaches on conceptual as well as implementation level, so the students will gain a deeper understanding of current system software structures and realizations.
Knowledge: The students will obtain a deeper insight into theories and concepts in the area of system software, specifically hypervisors, operating systems, and compiler tools, and their interaction with modern hardware. Knowledge about the structure of these systems will be acquired through the analysis of current examples from academia and industry. In this context, relevant terminology, models and research directions will be discussed with a focus on analysis and optimization of non-functional properties.
Competence: The students should be able to evaluate and set into context the approaches employed by research as well as industrial approaches in the area of system software. They should be able to understand models for non-functional properties (like runtine and energy consumption) and assess system software concepts and implementations with regard to these properties.
This course will be seminar-based. The syllabus will be a selected set of scientific articles. Students are required to read the articles in advance. In each seminar one or two students will prepare a short presentation and questions for the discussions.
Participation in seminars. The date of the first seminar will be announced in the beginning of September.
 D. Chisnall, C. Rothwell, R. N.M. Watson, J. Woodruff, M. Vadera, S. W. Moore, M. Roe, B. Davis, and P. G. Neumann. Beyond the PDP-11: Architectural support for a memory-safe C abstract machine, Proceedings of ASPLOS 2015, Istanbul, Turkey, March 2015.
 J. Woodruff, R. N. M. Watson, D. Chisnall, S. W. Moore, J. Anderson, B. Davis, B. Laurie, P. G. Neumann, R. Norton, and M. Roe. The CHERI capability model: Revisiting RISC in an age of risk, Proceedings of ISCA 2014, Minneapolis, MN, USA, June 14–18, 2014.
 A. Baumann, P. Barham, P.-E. Dagand, T. Harris, R. Isaacs, S. Peter, T. Roscoe, A. Schüpbach, and A. Singhania. The multikernel: a new OS architecture for scalable multicore systems. In Proceedings of SOSP ’09. ACM, New York, NY, USA, 29–44.
 S. Peter, J. Li, I. Zhang, D. R. K. Ports, D. Woos, A. Krishnamurthy, and T. Anderson. Arrakis: The Operating System is the Control Plane. In Proceedings of OSDI ’14. USENIX Association, USA.